Sat in a lecture writing words about counters and comparators. The instantiations are filled with certain wires and breadboards. There are two ways of instantiations; follow the port map and put the signals in the right order, or use a clock on the top level.

Count out is the most output of the counter and flag is a flag.

Top level signals not mentioned.

Theory is, join the recipe together in anger with a port reset type and that will give you the entity declaration.

For the component declaration add signals for the aforementioned signals in clarity with an internal wire.