Steam Community :: Guide :: Walkthrough by tyryi

Store Page

Turing Complete

All Discussions Screenshots Artwork Broadcasts Videos News Guides Reviews

Turing Complete > Guides > tyryi's Guides

Not enough ratings

Walkthrough by tyryi

By tyryi

walkthrough for the game; simple and efficient circuits; WIP; comments, corrections, etc. highly appreciated;
FINALLY UPDATED!

Award

Created by

tyryi
Offline

Category: Achievements, Walkthroughs

Languages: English

Posted

Updated

14 Jan, 2022 @ 3:23am

9 Aug, 2024 @ 9:46am

2,947	Unique Visitors
30	Current Favorites

Guide Index

Overview

Basic Logic

Arithmetic/Memory

CPU Architecture

Programming

CPU Architecture 2

Comments

Basic Logic

Crude Awakening:

Nand Gate:

Not Gate:

gate count: 1
delay: 2

And Gate:

Nor Gate:

Or Gate:

Always On:

Second Tick:

gate count: 2
delay: 4

Xor Gate:

(Alt1):

gate count: 3
delay: 4

(Alt2):

gate count: 4
delay: 6

Bigger Or:

gate count: 2
delay: 4

Bigger And:

gate count: 2
delay: 4

Xnor Gate:

gate count: 3
delay: 4

Arithmetic/Memory

Binary Racer:

Double Trouble:

gate count: 11
delay: 8

Odd Number of Signals:

gate count: 9
delay: 8

Circular Dependency:

Counting Signals:

(alt 1: trivial)
gate count: 25
delay: 8

(alt 2: optimized)
gate count: 13
delay: 8

Half Adder:

(alt 1: trivial):
gate count: 4
delay: 4

(alt 2: optimized):
gate count: 3
delay: 4

Delayed Lines:

Double The Number:

Full Adder:

(alt 1: trivial)
gate count: 9
delay: 8

(alt 2: optimized)
gate count: 7
delay: 8

Odd Ticks:

gate count: 2
delay: 2

Bit Switch:

Byte Or:

gate count: 8
delay: 2

Byte Not:

gate count: 8
delay: 2

Adding Bytes:

(alt 1: trivial Ripple-Carry-Adder):
gate count: 56
delay: 64

(alt 2: optimized Ripple-Carry-Adder):

gate count: 56
delay: 36

(alt 3: Carry-Select-Adder):

gate count: 113
delay: 16

Negative Numbers:

Change the leftmost bit from '128' to '-128'.

Input Selector:

gate count: 17
delay: 4

Signed Negator:

(alt 1: trivial):

gate count: 27
delay: 16

(alt 2: optimized):

gate count: 25
delay: 12

The Bus:

Saving Gracefully:

gate count: 4
delay: 4

Saving Bytes:

(alt 1: trivial):
gate count: 40
delay: 6

(alt 2: optimized):
gate count: 33
delay: 4

1 Bit Decoder:

gate count: 1
delay: 2

3 Bit Decoder:

(alt 1: trivial):
gate count: 19
delay: 6

(alt 2: optimized):
gate count: 17
delay: 4

Logic Engine:

(alt 1: trivial):
gate count: 118
delay: 8

(alt 2: optimized+onlyByte):
gate count: 74
delay: 14

Little Box:

gate count: 154
delay: 12

Counter:

(alt 1: trivial):

gate count: 106
delay: 44

(alt 2: optimized):

gate count: 56
delay: 12

CPU Architecture

Arithmetic Engine:

gate count: 169
delay: 46

Registers:

see level 'Turing Complete'

Instruction Decoder:

gate count: 6
delay: 4

Calculations:

see level 'Turing Complete'

Conditions:

gate count: 13
delay: 14

Program:

see level 'Turing Complete'

Immediate Values:

see level 'Turing Complete'

Turing Complete:

gate count: 355
delay: 78

Programming

Add 5:

on OVERTURE:

tick: 5

program binary editor:

5 130 177 68 158 196

optimized:

Calibrating Laser Cannons:

on OVERTURE:

tick: 11

program assembly editor:

#read value mov_r1_in #double value mov_r2_r1 add #store double mov_r4_r3 #double again mov_r1_r3 mov_r2_r1 add #add 2*value and 4*value mov_r1_r3 mov_r2_r4 add #write 6*value mov_out_r3

optimized:

gate count: 34
delay: 24

Spacial Invasion:

# 0 turn left # 1 move # 2 turn right # 3 wait # 4 action # 5 shoot 0 1 1 2 1 1 1 1 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 5 5 5 5 3 3 3 3 3 3 3 3 3 3 3 3 5 5 5 5 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 5 5 5 5 3 3 3 3 3 3 3 3 3 3 3 3 5 5 5 5

Storage Cracker:

on OVERTURE:
#TODO

optimized:

gate count: 158
delay: 40
tick: 16

optimized2:

gate count: 8
delay: 2
tick: 9

Masking Time:

on OVERTURE:

tick: 5

#read input mov_r1_in #AND with 3: # abcdefgh #& 00000011 #= 000000gh 3 mov_r2_r0 and #output result mov_out_r3

optimal:

gate count: 0
delay: 0
tick: 1

The Maze:

on OVERTURE:

tick: 7644

const nothing 0 const wall 1 const door 3 const left 0 const move 1 const right 2 const action 4 label step #turn left left mov_out_r0 label turn #test input mov_r1_in nothing mov_r2_r0 sub doStep jz door mov_r2_r0 sub openDoor jz right mov_out_r0 turn j label doStep move mov_out_r0 step j label openDoor action mov_out_r0

optimal:

from the guide

State Machines -or- How to solve the maze with 2 gates by UnsignedRobin

gate count: 2
delay: 2
tick: 739

CPU Architecture 2

XOR:

on OVERTURE:

tick: 9

# read first input mov_r1_in # read second input mov_r2_in nor mov_r4_r3 # r4 = a nor b and # r3 = a and b mov_r1_r3 mov_r2_r4 nor # r3 = (a nor b) nor (a and b) = a xor b mov_out_r3

optimized:

gate count: 33
delay: 4
tick: 2

Byte Constant:

gate count: 0
delay: 0

Byte XOR:

gate count: 24
delay: 4

Equality:

gate count: 33
delay: 8

Unsigned Less:

gate count: 45
delay: 18

Signed Less:

gate count: 45
delay: 18

Wide Instructions:

6 Comments

< >

tyryi [author] 18 Apr, 2022 @ 4:21am

You are right.
That is weird, is says, it should involve at least two components.
afaik all basic gates, including AND, are considert one gate(one component).
Thank you for your input, update to this guide is coming soon.

SirKline 17 Apr, 2022 @ 4:17pm

there is an easier way for the circular dependency : connect the output of an and-Gate to one of its inputs

tyryi [author] 3 Apr, 2022 @ 5:24am

I will update as soon as possible :)

Rotten_Lynx 2 Apr, 2022 @ 7:19pm

Most of these no longer work because of the realism changes. Eg. signals no longer OR when they meet. Now it only gives you a short circuit.

tyryi [author] 30 Jan, 2022 @ 4:02pm

@Zaxabock Thanks

Zaxabock 30 Jan, 2022 @ 12:51pm

Wow!! That Carry Select Adder is a beast.
Speed vs Size trade of it seems. This guide has some awesome circuits!

< >